Currently, there are a NAND-type flash memory and a NOR-type flash memory as a memory which retains a program or a data in a nonvolatile state.
In the NAND-type flash memory having features of large-volume and high-speed data transfer, a memory-cell occupancy is improved by reducing an area size of an area where a bit line and a memory cell are connected to each other, and therefore, a read/write operating time (for one access, time until the access ends) is long. That is, since a so-called NAND string in which memory cells are connected in series is a basic structure, an RC delay in a read/write current path is large (here, “R” mainly indicates a wiring resistance of the NAND string or a global bit line and “C” indicates a parasitic capacity). Also, a data with a small information volume cannot be written in a short period of time because a so-called block erase operation which collectively erases a region wider than those of the read/write operations is required, and besides, because an operation method as writing information of several kilobytes in a long period of time is adopted. Meanwhile, the number of memory cells connected to one word line is large, and the number of memory cells which can be read and written in parallel to each other is large. Therefore, it has a structure that a data written from outside is temporarily buffered. Because of such a structure, when the written data is inputted from outside, a data of 2 kilobytes is continuously inputted, and therefore, it can be said that the data transfer efficiency is high.
On the other hand, in the NOR-type flash memory with high input/output speed, in order to reduce the read/write time, the memory cells are connected to a bit line in parallel, and besides, a length of the bit line is suppressed. Because of such a memory array structure, the RC delay in the read/write current path is reduced (here, “R” mainly indicates a wiring resistance of the bit line, and “C” mainly indicates a capacity which parasitizes the bit line). Meanwhile, a total area size of the areas where the bit line and the memory cell are connected to each other is larger than that of the NAND-type flash memory, and therefore, an integration degree is low. In this manner, in the conventional flash memory, the NAND type is used for a demand of the large-volume data transfer, and the NOR type is used for a demand of the short read/write time. Therefore, as the data volume to be handled for one access, 2 kilobytes and 1 to 2 bytes are fixed in the NAND type and the NOR type in accordance with the features of their memories, respectively.
Meanwhile, Patent Document 1 has been published regarding flash memories with different write units. The flash memories according to the document include: program-storage flash memories FLP_A (5) and FLP_AB (6); and a data-storage flash memory FLD9. When a program of 256 bytes is written therein, both of the FLP_A (5) and the FLP_AB (6) are accessed for a continuous space in the program-storage flash memories. On the other hand, when a data of 128 bytes is written therein, only the FLD9 is accessed.
Further, as a next-generation nonvolatile memory, a phase-change memory having a structure different from those of the conventional NAND type and NOR type and using a recording layer made of a chalcogenide material and a diode has been suggested. In a storage element of the phase-change memory which has been currently studied, a chalcogenide material (or a phase-change material) such as a Ge—Sb—Te based material or a Ag—In—Sb—Te based material in which at least antimony (Sb) and tellurium (Te) are contained is used as a material of the recording layer. Also, the diode is used as a selection element. In this manner, the characteristics of the phase-change memory using the chalcogenide material and the diode are described in, for example, FIG. 2 of Non-Patent Document 1.